Semiconductor die and integrated circuit packages are used in myriad applications. Often, these applications result in exposure of the semiconductor die and integrated circuit packages to environmental conditions such as high temperature, humidity, and the like. To prolong the lifetime of devices incorporating semiconductor die and integrated circuit packages, environmental protection is paramount. Specifically, protecting semiconductor die and integrated circuit packages from degradation due to moisture ingress is necessary for maintaining reliability of the devices.
Generally, environmental protection may be applied at the wafer level or the package level. State of the art wafer level environmental protection involves the application of one or more thin film inorganic environmental protection layers, as illustrated in FIGS. 1A and 1B. FIG. 1A shows a semiconductor wafer 10, which is separated into a number of discrete semiconductor die 12. FIG. 1B shows a cross-sectional view of a portion of one of the semiconductor die 12, which includes a substrate 14, an active area 16 in a top portion of the substrate 14, one or more intermediate layers 18 over the substrate 14, one or more metallization layers 20 over the one or more intermediate layers 18, and one or more inorganic environmental protection layers 22 over the one or more metallization layers. Those skilled in the art will appreciate that the active area 16 may include one or more implanted, diffused, or epitaxially grown regions, and that the one or more intermediate layers 18 and the one or more metallization layers 20 may be patterned to form any number of semiconductor devices in the semiconductor die 12. For example, one or more implanted, diffused, or epitaxial regions in the active area 16 may interact with an intermediate layer 18 of oxide or nitride and one or more portions of a metallization layer 20 to form one or more transistors, one or more diodes, and the like.
Conventionally, the inorganic environmental protection layers 22 are applied via atomic layer deposition (ALD), and comprise oxides such as tantalum pentoxide (Ta2O4), aluminum oxide (Al2O3), or silicon nitride (Si3N4). While initially promising from an environmental protection perspective, these inorganic environmental protection layers 22 have proved inadequate in harsh environmental conditions. For example, when subjected to highly accelerated stress tests (HAST) in which the device is subject to 85% relative humidity at 130° C. for 96 hours under certain bias conditions or temperature humidity bias (THB) tests in which the device is subject to 85% relative humidity at 85° C. for 1000 hours under certain bias conditions, the device may fail due to moisture ingress and corrosion.
FIG. 2 illustrates state of the art package level environmental protection. As shown, a semiconductor die 24 is attached to a package substrate 26 using a die attach 28, and wire bonds 30 electrically connect the semiconductor die 24 to the package substrate 26. A number of solder balls 32 may couple the package substrate 26 with a module (not shown), or other circuitry. An encapsulation layer 34 is usually provided over the semiconductor die 24 such that the semiconductor die 24 is completely encapsulated thereby.
Conventionally, the encapsulation layer 34 is an epoxy layer that is extruded or otherwise molded over the package. That is, the encapsulation layer 34 is not a thin film layer and is not provided via a vapor deposition process. While the encapsulation layer 34 of modern packages is quite good at preventing moisture ingress, providing environmental protection at the package level is much more cumbersome and results in a much larger device than when provided at the wafer level.
In light of the above, there is a need for improved environmental protection at both the wafer level and package level.